Job Requirements
Owego, NY
Intel Agency (NSA, CIA, FBI, etc) Polygraph Unspecified
Career Level not specified
Salary not specified
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Job Description
PDS Defense, Inc. is seeking a FPGA Design/Verification Engineer, in Owego, NY. Job ID#224936
Pay Rate: $60 - $80/hr
Job Description:
The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.
This is primarily a Verification Position:
Experienced FPGA Verification Engineer to support the development and certification of safety-critical avionics hardware. The engineer will support verification activities required for DO-254 compliance, including requirement analysis, test development, execution, simulation, coverage analysis, and back-annotation of results. The role will work closely with design, systems, and certification teams to ensure the FPGA design meets stringent DO-254 Level A standards.
- Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify).
- Proficient in SystemVerilog
- Proficiency with HDL simulators, waveform viewers, and coverage tools.
- Familiarity with hardware-in-the-loop (HIL) test setups and test equipment (e.g., JTAG, logic analyzers).
- Prior involvement in FAA or EASA certification audits.
- Experience with version control systems and configuration management.
Desired Skills: Proficient in UVM. Proficient in C.
Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.
Military connected talent encouraged to apply.
VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled
To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit http://www.tadpgs.com/candidate-privacy/ or https://pdsdefense.com/candidate-privacy/
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
Pay Rate: $60 - $80/hr
Job Description:
The selected candidate will be responsible for ASIC & FPGA development on R&D program. This engineer with have experience in developing, testing, and integrating digital signal processing (DSP), high speed digital design, high speed communication and system-on-chip (SOC) implemented on FPGA platforms. Experience with COTS based control platforms and embedded processors on FPGA platforms. This person will help develop more affordable ways to automate and develop scripts to improve FPGA development efforts. Cross discipline collaboration with Systems Architects, RF/Analog & Digital Circuit designers and ASIC/FPGA engineers to create leading edge products for future business growth, contributing to complex systems employing high speed networking concepts. The selected candidate will also provide support and technical direction to junior engineers. Overall contribution to design, simulation, verification, integration & test of complex, high speed products.
This is primarily a Verification Position:
Experienced FPGA Verification Engineer to support the development and certification of safety-critical avionics hardware. The engineer will support verification activities required for DO-254 compliance, including requirement analysis, test development, execution, simulation, coverage analysis, and back-annotation of results. The role will work closely with design, systems, and certification teams to ensure the FPGA design meets stringent DO-254 Level A standards.
- Experience with FPGA design tools (Xilinx Vivado, Intel Quartus, Synopsys Synplify).
- Proficient in SystemVerilog
- Proficiency with HDL simulators, waveform viewers, and coverage tools.
- Familiarity with hardware-in-the-loop (HIL) test setups and test equipment (e.g., JTAG, logic analyzers).
- Prior involvement in FAA or EASA certification audits.
- Experience with version control systems and configuration management.
Desired Skills: Proficient in UVM. Proficient in C.
Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter.
Military connected talent encouraged to apply.
VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled
To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit http://www.tadpgs.com/candidate-privacy/ or https://pdsdefense.com/candidate-privacy/
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
- The California Fair Chance Act
- Los Angeles City Fair Chance Ordinance
- Los Angeles County Fair Chance Ordinance for Employers
- San Francisco Fair Chance Ordinance
group id: 9117PDSD